Category Archives: 2014 Events

Silicon Valley Engineering Council Open House

Silicon Valley Engineering Council Open House

Friday, November 21, 2014

PayPal Town Hall, 2161 North 1st Street, San Jose CA (map)

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Is 3D Visualization the Next Step for Big Data?

  Date: Tuesday, December 2, 2014, 6:30 PM
  Location: Cadence / Bldg 10, 2655 Seely Ave, San Jose, CA (map)
  Speaker: David Chavez, Chief Technology Officer, zSpace, Inc.

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Agile Update – And Is It For You? – Panel

Date: Tuesday, October 14, 2014, 6:30 PM
Location: Cadence / Bldg 10, 2655 Seely Ave, San Jose, CA (map)
Agile Discussion: Kanban, Scrum, SoC, and ASIC …
Panelists:
Kathryn Kuhn, Hewlett-Packard, Agile Evangelist – Product Development IT
Harsh Kumar, Intel, Business Development Manager
Damian Brown, Symantec, Sr. Manager, Program Management
William Pietri, Consultant

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A New Nonvolatile Memory Technology – Persistence Pays Off


  Date: Tuesday, September 9, 2014, 6:30 PM
  Location: Cadence / Bldg 10, 2655 Seely Ave, San Jose, CA (map)
  Speaker: Edward Grochowski, Computer Memory and Storage Consultant

 

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Hot Chips: A Symposium on High Performance Chips

Hot Chips: A Symposium on High Performance Chips

Sunday-Tuesday, August 10-12, 2014

Flint Center at De Anza College in Cupertino, CA (map)

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Next Generation Authentication for Critical Information Security


  Date: Tuesday, June 10, 2014, 6:30 PM
  Location: Cadence / Bldg 10, 2655 Seely Ave, San Jose, CA (map)
  Speaker: Daniel Caselles, Co-founder and CTO of Authenware Corporation

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Netflix’s Video Workflow: Transcoding, Codecs and 4K Streaming

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NFIC 2014: The Future of Online Education Video

Video stream archive of NFIC 2014: The Future of Online Education, an event held on May 14, 2014 at Stanford University

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NFIC 2014: The Future of Online Education

The Future of Online Education

Wednesday, May 14th, 2014, 4pm – 10pm, at Stanford University

 

David Packard Electrical Engineering Building Auditorium (map)

 

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A Secure Cloud for Education Delivery

  Date: Tuesday, May 6, 2014, 6:30 PM
  Location: Cadence / Bldg 10, 2655 Seely Ave, San Jose, CA (map)
  Speaker: Robert Fogel, Principal Education Architect, Intel World Ahead

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Electronic Design Process Symposium (EDPS) 2014

 21st Annual

Electronic Design Process Symposium

April 17 & 18, 2014

Monterey Beach Hotel, Monterey, CA

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Top SoC Design Challenges – Panel


Date: Tuesday, April 8, 2014, 6:30 PM
Location: Cadence / Bldg 10, 2655 Seely Ave, San Jose, CA (map)
Panelists:
Naresh Sehgal, Intel, SW Director for FPGA based Silicon platforms for Mobile products
Paul McLellan, SemiWiki Project, Blogger & EDA Expert
Tom Dillinger, Oracle, CAD Technology
John Swan, Swan on Chips, SoC Technologist

 

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Cleanroom Robots for Semiconductor Manufacturing


  Date: Tuesday, March 11, 2014, 6:30 PM
  Location: Cadence / Bldg 10, 2655 Seely Ave, San Jose, CA (map)
  Speaker: Dr. Karl Mathia, President, Zidecs Automation

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OpenZFS: The Future of Open Source ZFS Development

  Date: Tuesday, February 11, 2014, 6:30 PM
  Location: Cadence / Bldg 10, 2655 Seely Ave, San Jose, CA (map)
  Speaker: Matt Ahrens, Software Engineer, Delphix

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