Category Archives: 2019 Events

Postgres Conference Silicon Valley

Relevant conference for IEEE CS members:
September 18 – 20, 2019, San Jose

Postgres Conference Silicon Valley is the largest gathering about People, Postgres, Data on the West Coast!

IEEE Members can get 25% discount using the following discount code: IEEE_DISCOUNT
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IEEE Computer Society (IEEE CS) chapter Open House – Everything you need to know about AI & Machine Learning, but were afraid to ask

IEEE CS Chapter Open House – Everything you need to know about AI & Machine Learning, but were afraid to ask
Monday, September 23, 2019, 4:00PM – 8:30 PM PDT. The event is FREE.
Warm delicious food (no pizza or sandwiches) & drinks will be provided

This Open House event is organized by:
IEEE Computer Society (CS) chapter of Silicon Valley https://computer.ieeesiliconvalley.org/  in benefit of all its members.

Speaker #1: Rohit Sharma
Title: Founder, AI Tech Systems
Topic #1: Machine Intelligence in Design Automation

Speaker #2: Sumit Gupta
Title: VP, AI, Machine Learning, and HPC in the IBM Cognitive Systems business
Topic #2: AI and Machine Learning

Speaker #3: Eric Saund
Title: Research Scientist
Topic #3: Cognitive Architecture in Models for Natural and Artificial Intelligence

Location: SEMI at 673 South Milpitas Boulevard Milpitas, CA 95035-5446 (View Map)

                                                   (Register here)

PROGRAM:
4:00PM – 4:45PM–Registration, Food, Drink, Networking
4:45 – 5:15PM — IEEE CS chapter presentation
5:15PM – 6:00PM — Machine Intelligence in Design Automation
6:00PM – 6:45PM — Dinner and Networking
6:45PM – 7:30PM– AI and Machine Learning
7:30PM – 8:15PM –Cognitive Architecture in Models for Natural and Artificial Intelligence
8:15PM – 8:30PM — Q&A and Adjourn

Speaker #1:
Abstract:
Motivation behind this talk is to throw some light on use of machine intelligence in design automation; a topic that is largely absent from the media and academia. Machine Intelligence is advancing at a rapid pace and claim to this fame is that it is bound to enable an unprecedent degree of automation in every walk of life. Design automation, a field that has been automating semiconductor design for decades, continues to struggle successful applications of Machine Learning

Bio:

Rohit Sharma is an engineer, author and entrepreneur. He has published many papers in
international conferences and journals. He has contributed to electronic design automation
domain for over 20 years learning, improvising and designing solutions. He is passionate about many technical topics including machine learning, deep learning, VLSI characterization, analysis, and modeling. It led him to design and architect several design automation products. He wrote a book on Machine Intelligence in Design Automation in 2018. He has been disseminating information on the use of machine intelligence in design automation since 2017 with his book, blogs, opens source code, contests, webinar, symposium, and other collateral. He currently works for AI Technology and Systems (www.ai-techsystems.com).

2) Speaker #2:
Abstract:
Most of us don’t realize how pervasive AI is in our everyday lives. Facebook recently reported that 200 trillion AI predictions run on their platforms every day. In this talk, we will start by explaining what the various AI terms are, demonstrate what is possible with modern AI methods that was not possible before, and then talk about AI use cases that range from sports, to gaming, to industrial & enterprise.

Bio:


Sumit Gupta is VP, AI, Machine Learning, and HPC in the IBM Cognitive Systems business. Sumit leads the business strategy and software and hardware products for machine learning, deep learning, & HPC, including Watson ML Accelerator (formerly PowerAI) and Spectrum Compute. Prior to IBM, Sumit was the general manager of the AI & GPU accelerated data center business at NVIDIA and was central in building that business from the ground-up to what is now a multi-billion dollars business for NVIDIA. Sumit has a Ph.D. in CS from UC, Irvine, and a BS in EE from IIT Delhi

3) Speaker #3:
Abstract:
*Cognitive Architecture* is a key organizing framework for AI and Machine Learning as well as for understanding natural intelligence. Narrow applied AI and ML can afford to neglect the concept; AGI (Artificial General Intelligence) cannot. This talk will relay major motivations, concepts, and challenges for Cognitive Architectures as exemplified by SOAR and Copycat. At base is the perception/action loop. For conversational agents, the architectural elements of this loop display progress and limitations that explain why we are simultaneously delighted and disappointed by their capabilities.

Bio:


Eric Saund is a research scientist, developer, and consultant whose work spans multiple fields of intelligent systems, including conversational agents, document analytics, perceptually supported user interfaces, machine learning, and computational vision. Eric received a B.S. from Caltech and a Ph.D. in Cognitive Science from MIT. He served in research and research management roles at the Xerox Palo Alto Research Center, he has published widely, his prototypes have served thousands of users, and he has been awarded over 50 patents to date.

Open to all to attend
(Online registration is needed. If you did not register, seating is not guaranteed.)

Call for volunteers for this event:
If you are interested in volunteering at our IEEE CS chapter Open House email us Here.

Eventbrite - enabling-digital-transformation-at-the-edge
Posted in 2019 Events, Upcoming Events | Comments Off on IEEE Computer Society (IEEE CS) chapter Open House – Everything you need to know about AI & Machine Learning, but were afraid to ask

Three Free Technical Talks on July 10 at 5pm

Three Free Technical Talks on July 10 at 5pm

  • Title1: Demystifying Wifi6
  • Spaker1: Qinfang Sun, Senior Director of Technology
  • Title 2: WiGig: 60 GHz Wifi
  • Speaker2: Priya Subramanian, Principal Engineer/Manager
  • Title 3: CV2X: Cellular Vehicle-to-Everything
  • Speaker3: Sudha Sridaran, Senior Staff/Manager

IEEE CS SCV is sponsoring these technical talks as relevant to our members.
Organized by: IEEE SCV WIE and Qualcomm
Sponsored by: IEEE Computer Society (CS) of Silicon Valley

Book your ticket today here!

Location: Qualcomm Inc. Building B – Café, 3165 Kifer Rd, Santa Clara, CA
Program:
 5:00 pm – 6:00 pm Registration, Networking, Hors D’oeuvre and Demos
 6:00 pm – 7:45 pm Welcome and Tech Talks
 7:45 pm – 8:00 pm Closing and Raffle
For addition information follow the link.

Posted in 2019 Events | Comments Off on Three Free Technical Talks on July 10 at 5pm

Network Services in a Multi-Vendor Environment

Monday, July 15, 2019, 6:30 PM – 9:00 PM PDT

The event is FREE. Food & drinks will be provided.

This event is organized by:

 Co-sponsors:

 Speaker1: Saikrishna Kotha
                       Director, Global Network Engineering

Speaker2: Anand Palaniswamy
                       Sr. Manager, Cloud Engineering at PayPal

Location: PayPal Town Hall, 2161 N 1st St. San Jose, CA 95131  View Map  

(Register here)

PROGRAM:

  • 6:30 – 7:00 PM Registration, Pizza, Networking & Refreshments
  • 7:00 – 8:30PM Technical Talks
  • 8:30 – 8:50PM Q&A/Adjourn
  • 9:00PM everybody must vacate the building 

1) Speaker1:

Abstract:
Core Network Services provides network connectivity for PayPal site infrastructure. To address 5 9s’ site reliability goals, the demand for network to perform at its best keeps growing. PayPal transformed its data center networks by deploying white-box leaf/spine designs to help with horizontal scaling, low latency, and resilience to failures. By developing common framework layer, PayPal is able to address network automation/service API needs in multi-vendor environment. Saikrishna will discuss the design approach, lessons learned and how various vendor technologies are leveraged in this transformation process.

Bio: Saikrishna Kotha

Saikrishna has 20 years of technology leadership and management experience in networking domain spanning across optical, wireless, and wired technologies. Saikrishna’s recent focus has been implementing web scale Datacenter networking technologies. Currently he leads PayPal’s Core Network Services organization. Prior to PayPal, Saikrishna worked at LinkedIn where he was instrumental in building white-box network switches. He also worked at Dell, Xilinx, Tasman Networks (acquired by Nortel) and Ciena. Saikrishna holds 12 issued patents and 15 pending in converged storage/networking technologies, SDN and NFV domains. Saikrishna holds MBA from TAMU-commerce and Bachelor’s degree in ECE from Andhra University, India.
 LinkedIn profile: https://www.linkedin.com/m/profile/saikrishnakotha/

2) Speaker2:

Abstract:
Core Network Services provides network connectivity for PayPal site infrastructure. To address 5 9s’ site reliability goals, the demand for network to perform at its best keeps growing. PayPal transformed its data center networks by deploying white-box leaf/spine designs to help with horizontal scaling, low latency, and resilience to failures. By developing common framework layer, PayPal is able to address network automation/service API needs in multi-vendor environment. Saikrishna will discuss the design approach, lessons learned and how various vendor technologies are leveraged in this transformation process.

Bio: Anand Palaniswamy

Anand has 18+ years of experience and works at PayPal for last 7 years. Currently, he is focused on building APIs to enable self-service capabilities for PayPal Core Network Services and he was leading Cloud Software Engineering team for building PayPal private cloud. Prior to PayPal, he was part of eBay for an year and worked for Tellabs where he was building frameworks and platform for Network Management System. Anand received his Master’s degree in Computer Science from University of Madras.

Open to all to attend

(Online registration is needed. If you did not register, seating is not guaranteed.)

Eventbrite - enabling-digital-transformation-at-the-edge
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Squeezing down the computing requirements of deep neural networks

Wednesday, July 24, 2019, 6:00 PM – 8:00 PM PDT  

The event is FREE. Food & drinks will be provided.

This event is organized by:

 Co-sponsors:

Speaker1:  Forrest Iandola, CEO and co-Founder of DeepScale

Speaker2: Albert Shaw, Engineer at DeepScale

Location: 673 South Milpitas Blvd. Milpitas, CA 95035, USA  View Map 

(Register here)

PROGRAM:

  • 6:00 – 6:30 PM Networking & Refreshments
  •  6:30 – 7:30 PM Talk
  • 7:30 – 8:00 PM Q&A/Adjourn

Abstract: Deep Neural Networks (DNNs) have enabled breakthrough levels of accuracy on a variety of tasks in vision, audio, and text. However, DNNs can be quite computationally-intensive, and highly-accurate DNNs often require a full-sized GPU server for real-time inference. To squeeze DNNs into smaller computing footprints, there are a number of techniques, including better DNN design, DNN quantization, better implementations of DNNs, and better utilization of specialized computing hardware. This talk touches on all these techniques, with particular focus on better DNN design for computer vision. Recently, Neural Architecture Search (NAS) technologies have begun to make significant progress in automating the process of designing “squeezed” DNNs, and we cover some of the latest work on NAS in this talk.

Bio: Forrest Iandola  

Forrest Iandola completed a PhD in Electrical Engineering and Computer Science at UC Berkeley, where his research focused on improving the efficiency of deep neural networks (DNNs). His best-known published research ranges from scaling DNN training to hundreds of GPUs (FireCaffe), to squeezing DNNs onto small edge-devices (SqueezeNet and SqueezeDet). His advances in scalable training and efficient inference of DNNs led to the founding of DeepScale, where he has been CEO since 2015. DeepScale builds energy-efficient vision and perception systems for automated vehicles.

Bio: Albert Shaw

Albert Shaw has been working on research in Neural Architecture Search (NAS) since 2017. He received his Masters in Computer Science from the Georgia Institute of Technology where he focused on speeding up Neural Architecture Search and creating more sample-efficient algorithms for Reinforcement Learning. At DeepScale, his work focuses on using NAS to develop state-of-the-art fast and accurate Deep Neural Networks for automated vehicle perception systems.

Open to all to attend

(Online registration is needed. If you did not register, seating is not guaranteed.)

Eventbrite - enabling-digital-transformation-at-the-edge

 

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[ValleyML.ai, IEEE SPS, CIS, CS, CAS] Hands-on OpenVX Inference Tutorial

[ValleyML.ai, IEEE SPS, CIS, CS, CAS] Hands-on OpenVX Inference Tutorial

Friday‎, ‎June‎ ‎14‎, ‎2019, ‎2‎:‎30‎ ‎PM to ‎5‎:‎30‎ ‎PM

IEEE CS SCV chapter is co-sponsoring this event as a relevant and beneficial to all our IEEE CS chapter members

Location: AMD Inc., 2485 Augustine Dr. Santa Clara, CA 95054

Event sponsored and organized by:

Co-sponsors:

Details & Registration at: https://www.eventbrite.com/e/ieee-sps-mivisionx-inference-tutorial-tickets-62540630710
Only limited seats are available for the tutorial. Book your tickets now at Eventbrite

Posted in 2019 Events | Comments Off on [ValleyML.ai, IEEE SPS, CIS, CS, CAS] Hands-on OpenVX Inference Tutorial

[ValleyML.ai, IEEE SCV-CIS and CS] AI, ML and Storage

[ValleyML.ai, IEEE SCV-CIS and CS] AI, ML and Storage

Hosted as a free event/open session for public as part of Flash Memory Summit on Wednesday, August 7th, 7pm to 9 pm

Organized by:

Sponsored by:

IEEE CS SCV is sponsoring this event as a relevant event for our members.

Register for a free exhibit pass at https://www.flashmemorysummit.com/

Free exhibit pass provides the access to exhibits, key notes and open
sessions.

Posted in 2019 Events | Comments Off on [ValleyML.ai, IEEE SCV-CIS and CS] AI, ML and Storage

[ValleyML.ai] State of AI and ML-Summer 2019

[ValleyML.ai] State of AI and ML-Summer 2019

August 16, 9:00 AM – August 17, 6:00 PM PDT, @ Z-Park Silicon Valley, 4500 Great America Pkwy, Santa Clara, CA 95054, USA.

IEEE CS SCV is listing this event here as a relevant event for our members.

Join this 2-day event as part of series of regularly planned events to learn about the state-of-the-art advances in artificial intelligence (AI) and machine learning (ML) technology. Get IEEE PDH Certificate from IEEE Continuing Education.

Go to ValleyML.ai and hit register to go to Eventbrite page and use discount code VALLEYML_CS25 to get 25% off.

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Emergence of RISC-V computer architecture- embedded apps & ML acceleration

Emergence of RISC-V computer architecture- embedded apps & ML acceleration

 August 21 @ 7:00 pm9:00 pm, @ PayPal Town Hall, 2161 North First St. San Jose, CA 95131 View Map

 IEEE CS SCV is sponsoring this event as a relevant event for our members.

 Organized by:

Sponsored by:

§  IEEE Computer Society (CS) of Silicon Valley

 (Register here)

Posted in 2019 Events | Comments Off on Emergence of RISC-V computer architecture- embedded apps & ML acceleration

[ValleyML.ai] Machine Learning and Deep Learning Boot Camp

[ValleyML.ai] Machine Learning and Deep Learning Boot Camp
August 29th through October 17th, 2019, ValleyML.ai; Machine Learning and Deep Learning Boot Camp, @Z-Park, 4500 Great America Pkwy, Santa Clara

 IEEE CS SCV is listing this event here as a relevant event for our members.

This Boot Camp is available to register as a complete course of 8 workshops and also as a custom package of individual workshops. Attend this boot camp to build a solid foundation of Machine Learning/ Deep Learning principles and apply the techniques to real-world problems. Entire Program schedulealong with instructor bios can be downloaded here as a PDF:
https://drive.google.com/file/d/1xjiqpf_w0sgHsoU-0NeTHMxCG02DlF-m/view?usp=sharing
Attendees can get IEEE PDH Certificate from IEEE Continuing Education. 

Please register at http://mldlbootcamp.eventbrite.com/?discount=VALLEYML_CS40 for Early bird discount of 40%! Early bird tickets till July 12th.
The above link has an embedded discount code VALLEYML_CS40 to get 40% discount. Early bird tickets (40% discount) last till July 12th.

Regular registration [ https://mldlbootcamp.eventbrite.com?discount=VALLEYML_CS25  ] (25% discount code VALLEYML_CS25) period is from July 13th to August 22nd.
Late registration [ https://mldlbootcamp.eventbrite.com/?aff=cs ] (no discount) starts from August 23rd.
Posted in 2019 Events, Upcoming Events | Comments Off on [ValleyML.ai] Machine Learning and Deep Learning Boot Camp

Artificial Intelligence for Industry (AI4I) Forum

 Artificial Intelligence for Industry (AI4I) Forum 
May 22, 2019, 1:00 pm - 5:00 pm PDT
Free

Event sponsored and organized by:
IEEE Circuits and Systems Society (CASS)
 
Co-sponsors:
 Circuits and Systems Society – Santa Clara Valley Chapter (CASS-SCV)
Computer Society (CS)
Computational Intelligence Society (CIS)
Solid-State Circuits Society(SSCS)
Silicon Valley Engineering Council (SVEC)
 
(Register here)
 
DATE & TIME:
Wednesday, May 22nd, 2019. 1 PM – 5 PM
 
PROGRAM:
1:00 – 1:30 PM Check-in / Networking & Refreshments
1:30 – 2:15 PM Prof. Kurt Keutzer (UC Berkeley)
2:15 – 3:00 PM Prof. Yung-Hsiang Lu (Purdue University)
3:30 – 4:15 PM Dr. Pradeep Dubey (Intel)
4:15 – 5:00 PM TBD
5:00 PM Adjourn
 
LOCATION:
International Technological University, Main Auditorium 2711 N 1st St, San Jose, CA 95134 (between Montague & Trimble along N. 1st Street)
VT Light Rail access from downtown San Jose and Mountain View. In person attendance requested. Maximum capacity: 280. Please register to guaranty seating.
 
AGENDA:
1:30 – 2:15 PM Prof. Kurt Keutzer (UC Berkeley)
TITLE: Co-Design of Deep Neural Nets and Neural Net Accelerators for Embedded Vision Applications
ABSTRACT: Deep Learning is arguably the most rapidly evolving research area in recent years. As a result it is not surprising that the design of state-of-the-art deep neural net models proceeds without much consideration of the latest hardware targets, and the design of neural net accelerators proceeds without much consideration of the characteristics of the latest deep neural net models. Nevertheless, we show that there are significant improvements available if deep neural net models and neural net accelerators are co-designed.
 
2:15 – 3:00 PM Prof. Yung-Hsiang Lu (Purdue University)
TITLE: Low-Power Computer Vision: Status, Challenges, and Opportunities
ABSTRACT: Energy efficiency plays a crucial role in making computer vision successful in battery-powered systems, including drones, mobile phones and autonomous robots. Since 2015, IEEE has been organizing annual competition on low-power computer vision to identify the most energy-efficient technologies for detecting objects in images. The scores are the ratio of accuracy and energy consumption. Over the four years, the winning solutions have improved the scores by a factor of 24. The speaker will describe this competition and summarize the winning solutions, including quantization and accuracy-energy tradeoffs. Based on technology trends, the speaker will identify the challenges and opportunities in enabling energy-efficient computer vision.
 
3:30 – 4:15 PM Dr. Pradeep Dubey (Intel)
TITLE: AI: What Makes it Hard and Fun!
ABSTRACT: The confluence of massive data with massive compute is unprecedented. This coupled with recent algorithmic breakthroughs, we are now at the cusp of a major transformation. This transformation has the potential to disrupt a long-held balance between humans and machine where all forms of number crunching is left to computers, and most forms of decision-making is left to us humans. This transformation is spurring a virtuous cycle of compute which will impact not just how we do computing, but what computing can do for us. In this talk, I will discuss some of the application-level opportunities and system-level challenges that lie at the heart of this intersection of traditional high-performance computing with emerging data-intensive computing.

4:15 – 5:00 PM TBD 000000000
Posted in 2019 Events | Comments Off on Artificial Intelligence for Industry (AI4I) Forum

“Plasticine: A Reconfigurable Dataflow Architecture for Software 2.0”

Thursday, April 18, 2019, 6:00 PM – 8:00 PM PDT
 
Speaker: Prof. Kunle Olukotun, Stanford University/SambaNova Systems
   
. Computer Society(CS)     
. Solid-State Circuits Society(SSCS)    
. Signal Processing Society(SPS) 
. Computational Intelligence Society (CIS/Artificial Intelligence)
 
Location:

Texas Instruments Silicon Valley Auditorium
2900 Semiconductor Dr.
Building “E”
Santa Clara, CA 95051
View Map
 
(Register here)
 
PROGRAM
6:00 – 6:30 PM Networking & Refreshments
6:30 – 7:45 PM Talk
7:45 – 8:00 PM Q&A/Adjourn

Abstract:
The use of machine learning to generate models from data is replacing traditional software development for many applications. This fundamental shift in how we develop software, known as Software 2.0, has provided dramatic improvements in the quality and ease of deployment for these applications. The continued success and expansion of the Software 2.0 approach must be powered by the availability of powerful, efficient and flexible chips that are tailored for machine learning applications. This talk will describe a design approach that optimizes computer systems to match the requirements of machine learning applications. The full-stack design approach integrates machine learning algorithms that are optimized for the characteristics of applications and the strengths of modern hardware, domain-specific languages and advanced compilation technology designed for programmability and performance, and a reconfigurable dataflow architecture called Plasticine that achieve both high flexibility and high energy efficiency.

Plasticine is a new spatially reconfigurable architecture designed to efficiently execute applications composed of parallel patterns. I will describe the Plasticine architecture: the compute pipeline that exploits nested parallelism, the configurable memory system that captures data locality and sustains compute throughput with multiple banking modes, and the on-chip interconnect that supports communication at multiple levels of granularity.
 
Bio:
Kunle Olukotun is the Cadence Design Professor of Electrical Engineering and Computer Science at Stanford University. Olukotun is well known as a pioneer in multicore processor design and the leader of the Stanford Hydra chip multipocessor (CMP) research project. Olukotun founded Afara Websystems to develop high-throughput, low-power multicore processors for server systems. The Afara multicore processor, called Niagara, was acquired by Sun Microsystems. Niagara derived processors now power all Oracle SPARC-based servers. Olukotun currently directs the Stanford Pervasive Parallelism Lab (PPL), which seeks to proliferate the use of heterogeneous parallelism in all application areas using Domain Specific Languages (DSLs). Olukotun is a member of the Data Analytics for What’s Next (DAWN) Lab which is developing infrastructure for usable machine learning. Olukotun is an ACM Fellow and IEEE Fellow for contributions to multiprocessors on a chip and multi-threaded processor design and is the recipient of the 2018 IEEE Harry H. Goode Memorial Award. Olukotun received his Ph.D. in Computer Engineering from The University of Michigan.
 
Admission Fee:
Open to all to attend(Online registration is needed. If you did not register, seating is not guaranteed.)
Non-members – $5 (Register at Door $15)
IEEE SSCS/CAS/CS/SPS/CIS society members – FREE
Students – FREE
IEEE (non-society) members – FREE (Register at Door $10)
You do not need to be an IEEE member to attend!

Update: Presentation slides/videos of this event are now available at http://sites.ieee.org/scv-sscs/previous-events/april-18-2019/ 

 

Posted in 2019 Events | Comments Off on “Plasticine: A Reconfigurable Dataflow Architecture for Software 2.0”

[ValleyML.ai] State of AI and ML-Spring 2019

April 4 @ 1:00 pm – 7:00 pm PDT

Related Events for AI/ML community (ValleyML.ai event):

State of AI and ML-Spring 2019

Location:

Intel, SC12 Auditorium, 3600 Juliette Ln, Santa Clara, CA 95054

In this event (State of AI and ML-Spring 2019), as part of series of regularly planned events, we plan to cover the state-of-the art advances in AI technology. For this event, we focus on AI Accelerators, Self-Driving and Face Processing. We feature five thought leaders from Computing, Autonomous systems and Computer Vision.

Please register soon for early bird tickets.

Early bird tickets till March 22nd
IEEE CS/CAS/CIS/ITSoC/RAS/SSCS Members -$65  
IEEE/ACM Members -$70
Others- $90

Regular Pricing from March 23rd till March 29th
IEEE CS/CAS/CIS/ITSoC/RAS/SSCS Members -$85
IEEE/ACM Members -$100
Others- $125
Free tickets for IEEE/ACM student members and members in transition.
Free tickets for ACM and IEEE CS/CAS/CIS/ITSoC/RAS/SSCS officers.

Posted in 2019 Events | Comments Off on [ValleyML.ai] State of AI and ML-Spring 2019

Data Management in the Cloud Era

April 25, 2019, 6:00-8:30PM

IEEE Computer Society of Silicon Valley

IEEE CS Chapter of Silicon Valley is organizing this free workshop technical event for all its IEEE CS chapter members in collaboration with:    
· https://ieee-region6.org/scv-cis/
 IEEE CIS (Santa Clara Valley Chapter of IEEE Computational Intelligence Society)
· Oracle providing this free workshop for IEEE CS members.

Co-sponsored by ValleyML.AI  & Silicon Valley Engineering Council https://www.svec.org/

Valley Machine Learning and Artificial Intelligence (ValleyML.ai) is the most active and important community of ML & AI Companies and Start-ups, Data Practitioners, Executives and Researchers in the Silicon Valley. ValleyML.ai bring together business leaders and applied machine learning and deep learning practitioners. We collaborate with other non-profit professional organizations such as ACM, IEEE Silicon Valley AI/CS/CAS/ITSoC/RAS/SSCS Chapters and other AI related organizations bringing a series of regularly planned events, seminars, conferences, and workshops. We plan to cover the state-of-the-art advancements in AI technology.  We have free tickets for IEEE/ACM students, members in transition and discounted tickets for IEEE/ACM members. There are minimal fees to break even for the event expenses. Attendees for most of the workshops get IEEE Certificates for Professional Development Hours.

Keynote:
1) Kris Bhanushali, Senior Principal Product Manager for Oracle’s Database Cloud Service

Location:
Oracle/Address: 4040 George Sellon Cir · Santa Clara, CA
Please check in into Clock Tower building 04

(Register here)

PROGRAM:
6:00PM – 6:30PM Networking & Refreshments
6:30PM – 7:00PM Keynote
7:00PM – 8:30PM the workshop

Abstract:
How is Data Management different today than it used to be? Well, to begin with, there is a gazillion times more data today than there used to be just a decade ago. Clearly, traditional tools of data management are not going to work. Let’s take a look at ways to manage enterprise data at scale without getting a PhD in database administration.

We all wear multiple hats in this cloud era so whether you are a developer, DBA, IT Ops or DevOps, this session is for you. We’ll also look at terraform based orchestration, ways to deploy microservices on a Kubernetes cluster and whip up some python/java apps quickly in the Oracle cloud.

WORKSHOP CREW:
1) Kiran Makarla, Principal Solution Marketing Director.
2) Vishal Atreja, Vishal is a cloud technology evangelist and a member of the Oracle Digital North America Technology Division Solution Engineering
3) Santosh Kumar Ramarathnam, Senior Technical Consultant at Oracle and is an OCI certified Associate.

The lab flow:
• Lab 1: Provisioning an Autonomous Database.
• Lab 2: Managing and Scaling Data using Autonomous Features.
• Lab 3: Configuring a Node.js app (as an example) to work with the Autonomous Database.
• Lab 4: Understanding and Working with REST APIs.
• Lab 5: Configuring Infrastructure
• Lab 6: Modern App Dev on Oracle’s Cloud Native Framework with Oracle Autonomous as the Backend, Database Layer.

IMPORTANT
Please fill out this https://forms.gle/W1mcm8kxdPtuw1zX9 to expedite the registration process and for us to provision your FREE Cloud Platform Trial account so that you can run this workshop smoothly. Please provide the email address that you have never used for Oracle Cloud Platform Trial account before. You will not be required to input your credit card for creating this account.
Prerequisites: bring Laptop- Either Windows/Mac and pre-install:
1. SQL Developer:
https://www.oracle.com/technetwork/developer-tools/sql-developer/downloads/index.html
On Windows:
Select the OS for your computer. (This page also has instructions on how to install SQL Developer on Windows, Mac OSX and Linux.)
If you already have SQL Developer installed on your computer please check the minimum version required to connect to an Oracle ADW Cloud is SQL Developer 17.4.
Mac:
https://www.oracle.com/technetwork/developer-tools/sql-developer/downloads/sqldev-install-mac-1969675.html
2. Data Visualization Desktop:
Oracle Data Visualization Desktop makes it easy to visualize your data so you can focus on exploring interesting data patterns. Choose from a variety of visualizations to look at data in a specific way. Data Visualization Desktop comes with Oracle ADW.
To download and install Data Visualization Desktop please follow:
https://www.oracle.com/technetwork/middleware/oracle-data-visualization/downloads/oracle-data-visualization-desktop-2938957.html
Select the OS for your computer. This page also has instructions on how to install DVD on Windows and Mac OSX.
If you already have Data Visualization Desktop installed on your computer then please check the version. The minimum version that is required to connect to an Oracle ADW Cloud is 12c 12.2.5.0.0.
Here is the Link to the learning Library you will need during the workshop. bit.ly/atpLabs

Open to all to attend
(Online registration is needed. If you did not register, seating is not guaranteed.)

Posted in 2019 Events | Comments Off on Data Management in the Cloud Era

The Origins of Silicon Valley: Why and How It Happened Here

May 1, 2019, 6:45PM-8:30PM 

The Origins of Silicon Valley: Why and How It Happened Here 

IEEE Computer Society of Silicon Valley
IEEE CS Chapter of Silicon Valley is sponsoring this free technical event

Speaker: Paul Wesling
IEEE Life Fellow and Distinguished Lecturer (retired from HP/Tandem) 
 
Location: Immanuel Lutheran Church,
    14103 Saratoga Ave, Saratoga (Map)
 
(Register here)

Sponsor: IEEE Computer Society of Silicon Valley
Sponsor/Host: Trust Fund Educational Seminar, Immanuel Lutheran Church 
Co-Sponsor:
· https://ieee-region6.org/scv-cis/
· http://www.valleyml.ai/
. Silicon Valley Engineering Council https://www.svec.org/

PROGRAM:
6:45PM – 7:30PM Networking/Wine/Appetizers 
7:30PM – 8:30PM Lecture
 
Abstract:
Why did Silicon Valley come into being?  
The storygoes back to local Hams (amateur radio operators) trying to  break RCA’s tube patents, “angel” investors, the sinking of the  Titanic, Fred Terman and Stanford University, local invention of  high-power tubes, WW II and radar, William Shockley’s mother  living in Palo Alto, 
and the SF Bay Area infrastructure that developed 
– these factors pretty much determined that  the semiconductor and IC industries would be located in the 
Santa Clara Valley, and that the Valley would remain  the world’s innovation center as new technologies emerged 
– computers, then software, mobile, biotech, Big Data,  VR, and now autonomous vehicles 
– and it would become the model for innovation worldwide.   

Bio:
Paul Wesling  

Paul Wesling, an IEEE Life Fellow and Distinguished Lecturer and ACM member, has observed the Valley for decades as an engineer, executive, resident, and educator, and has presented this talk world‐wide. In this non-technical presentation, he gives an exciting and colorful history of device technology development and innovation that began in Palo Alto, then spread across the Santa Clara Valley during and following World War II.  You’ll meet some of the colorful characters – Leonard Fuller, Lee de Forest, Bill Eitel, Charles Litton, Fred Terman, David Packard, Bill Hewlett, Russ Varian and others – who came to define the worldwide electronics industries through their inventions and process development.
You’ll understand some of the novel management approaches that have become the hallmark of tech startups and high-tech firms, and the kinds of engineers/developers who thrive in this work environment.
You’ll handle an original Audi on tube, invented by Lee de Forest and improved by him in Palo Alto.
Paul will end by telling us about some current local organizations that keep alive the spirit of the Hams, the Homebrew Computer Club, and the other entrepreneurial groups where geeks gather to invent the future.

Open to all to attend
Online registration is needed. If you did not register, seating is not guaranteed.)

Posted in 2019 Events | Comments Off on The Origins of Silicon Valley: Why and How It Happened Here